The board will be Open Source Hardware and will come with plenty of example designs around ATmega/Xmega and RISCv soft cores with the default PIO, UART, TWI, TIMER's, SPI and other peripherals that are found in an ATmega uC, all RTL source code is licensed under GPLv2.
Some of the designs can be used for day to day work, like Oscilloscope up to about 100M samples/second and logic analyzers.
The user guide can be download from https://devboard.tech/arduFPGA_iCE40UP5K_V1.1/arduFPGA_iCE40UP5K_user-guide.pdf
The repository for all designs and source code can be found on https://github.com/dev-board-tech
